Kanad Basu
Assistant Professor
Department of Electrial & Computer Engineering
University of Texas at Dallas
800 W. Campbell Road
Richardson, TX-75080
Contact
Office: ECSN 4.922
Phone: +1-972-883-4341
Email: kanad.basu@utdallas.edu
Education
- Ph.D.: Computer Engineering, University of Florida, 2012.
- M.S.: Computer Engineering, University of Florida, 2012.
- B.E.: Electronics and Telecommunication Engineering, Jadavpur University, India, 2007.
Experience
- Assistant Professor, Department of ECE, UT Dallas, August 2019 – present.
- Assistant Research Professor, Department of ECE, New York University, September 2017 – July 2019.
- Senior R&D Engineer, Synopsys Inc., September 2013-August 2017.
- Staff R&D Engineer, IBM Inc., August 2012-August 2013.
News
- 03/23: Paper titled “Search Space Reduction for Efficient Quantum Compilation” has been accepted for publication at ACM Great Lakes Symposium on VLSI
- 0223: Dr. Basu is serving as a Technical Program Committee Member for ACMIEEE International Symposium on Low Power Electronics and Design and INTERNATIONAL CONFERENCE ON COMPILERS, ARCHITECTURES, AND SYNTHESIS FOR EMBEDDED SYSTEMS
- 01/23: Paper titled “Trouble-shooting at GAN Point: Improving Functional Safety in Deep Learning Accelerators” has been accepted for publication at IEEE Transactions on Computers
- 01/23: Paper titled “Circuit Topology-aware Vaccination-based Hardware Trojan Detection” has been accepted for publication at IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- 11/22: Paper titled “Towards High-Level Synthesis of Quantum Circuits” has been accepted for publication at DATE 2023
- 11/22: Paper titled “Detecting Radiation-aware Functional Safety Violation via Early Anomaly Detection” has been accepted for publication at GoMacTech 2023
- 11/22: Paper titled “Towards Radiation-aware Functional Safety in Online AI Accelerators” has been accepted for publication at GoMacTech 2023
- 11/22: Paper titled “Scalable Semi-formal SoC Security Validation” has been accepted for publication at GoMacTech 2023
- 11/22: Paper titled “Designing Complex Mathematical Functions using Quantum Hardware” has been accepted for publication at GoMacTech 2023
- 09/22: Paper titled “Time Series-based Detection and Impact Analysis of Firmware Attacks in Microgrids” has been accepted for publication at Elsevier Energy Reports
- 08/22: Paper titled “Design and Analysis of a Scalable and Efficient Quantum Circuit for LWE Matrix Arithmetic” has been accepted for publication at ICCD 2022
- 08/22: Paper titled “Logic Locking of Integrated Circuits Enabled by Nanoscale MoS2 Based Memtransistors” has been accepted for publication at ACS Applied Nano Materials
- 08/22: Paper titled “A Security Analysis of Circuit Clock Obfuscation” has been accepted for publication at MDPI Cryptography Journal
- 07/22: Paper titled “A Novel Low-power Compression Scheme for Systolic Array-based Deep Learning Accelerators” has been accepted for publication at IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- 07/22: Paper titled “SeqL+: Secure Scan-Obfuscation with Theoretical and Empirical Validation” has been accepted for publication at IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- 07/22: Paper titled “Detecting Functional Safety Violation in Online AI Accelerators” has been accepted for publication at IEEE International Symposium on On-Line Testing and Robust System Design
- 07/22: Team TIES won the third prize at HACK@DAC 2022
- 06/22: Paper titled “Unsupervised Learning-based Early Anomaly Detection in AMS Circuits of Automotive SoCs” has been accepted for publication at International Test Conference
- 06/22: Paper titled “RIBoNN: Designing Robust In-Memory Binary Neural Network Accelerators” has been accepted for publication at International Test Conference
- 06/22: Paper titled “Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators” has been accepted for publication at IEEE Design and Test Journal
- 0522: Paper titled “Design and Logic Synthesis of a Scalable, Efficient Quantum Number Theoretic Transform” has been accepted for publication at ACMIEEE International Symposium on Low Power Electronics and Design
- 05/22: Paper titled “SEVNOC: Security Validation of System-on-Chip Designs with NoC Fabrics” has been accepted for publication at IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- 05/22: Paper titled “A Novel Unsupervised Learning Framework for Early Anomaly Detection of AMS Circuits in Automotive SoCs” has been accepted for publication at TECHCON 2022
- 05/22: Paper titled “Fault Resilience of DNN Accelerators for Compressed Sensor Inputs” has been accepted for publication at ISVLSI 2022
- 05/22: Paper titled “Survey on Quantum Noise-Aware Machine Learning” has been accepted for publication at Dallas CAS 2022